So it seems the display card is actually only the connected LED:s and nothing else?

What do you mean? Of course it's not just LEDs on the board, since there's 224 LEDs and only 30 pins, though there's no ICs besides the display IC, which includes the LEDs. But inside the display IC, there's some simple logic.

DogP

15x15 is 225 so that should be enough to control 224 LEDs...

If it's an array of 15x15 wires with a LED at each cross:
x:1 high y:1 gnd lights LED at (1,1)
x:3 high y:2 gnd lights LED at (3,2)

I have no idea how it's set up in the VB though.

Oh... no, it's not set up like that at all. It's clocked, draws 8 pixels at a time, 2bpp, and the brightness levels are sent as a pulse width on their own dedicated lines.

DogP

DogP:

Could you post the pinout that (I'm assuming) you reverse-engineered for your video-out device?

Someday, just for fun, I'd like to try driving the VB's displays with some other computer.

Oh... yeah, if I haven't already posted it, here's directly from my notes:

1-1.8V - connected to VCC across a cap
2-/RESET
3-GND
4-D0
5-D1
6-D4
7-D5
8-D8
9-D9
10-D12
11-D13
12-VCC
13-VCC
14-VCC
15-DCLK
16-LCLK
17-CLKC
18-CLKB
19-CLKA
20-GND
21-GND
22-D15
23-D14
24-D11
25-D10
26-D7
27-D6
28-D3
29-D2
30-1.8V - connected to VCC across a cap

Of course let me know if you've got any ?'s about it.

DogP

What's the 1,8V for?

Does it use 1,8V 5V, GND 5V and GND 1,8V for different intensities?

Oh... I don't think it's actually 1.8V... that was leftover from some notes I made a LONG time ago where I just did a simple check w/ a multimeter and noted values. I replaced the others as I figured out what they were, and I guess I never bothered with those (it's probably just a bypass cap, though I don't have a display next to me to look at again).

DogP

Zitat:

You know if you had posted it anywhere I wouldn't be asking... I am the official VB dev digital packrat, after all!

Zitat:

I only have one question:

What does "GND" mean?

heh, j/k... Here are the real questions (based on studying the VB and RTI patents and the VIP docs):

1. Are the pin numbers listed with the PCB in this orientation (i.e. is pin 1 in the upper right of that image)?
2. Which pin is used by the VB to "select" the display? (Or is /Reset just held low on the "other" one?)
3. What is/are the function(s) of pins 1 and 30? (If the caps are for decoupling, they must be grounds, right?)
4. 16 (data lines) times 8 (serial bits) = 128. So, how are all 224 (256?) LEDs written?
5. What do the "D" and "L" in DCLK and LCLK stand for?
6. Are CLK(A,B,C) just (as I suspect) inputs to an OR gate that enables the LED drivers?

Thanks!

Zitat:

Heh, that's very true... good point ;) .

>1. Are the pin numbers listed with the PCB in this orientation (i.e. is pin 1 in the upper right of that image)?

Yes... the numbers correspond to the markings on the main PCB, but they're in the same direction as those.

>2. Which pin is used by the VB to "select" the display? (Or is /Reset just held low on the "other" one?)

Pin 2 (/reset) is the select... so basically, the display is selected when that's high.

>3. What is/are the function(s) of pins 1 and 30? (If the caps are for decoupling, they must be grounds, right?)

Actually, I just looked at this again, the caps are on the main board side... it goes (VCC)-||-(disp pin), and then it goes to somewhere on the IC (not any of the other pins). It's probably just some weird requirement for the display IC (you could probably look at the datasheet of another LPH and see the same thing).

>4. 16 (data lines) times 8 (serial bits) = 128. So, how are all 224 (256?) LEDs written?

The 16 data lines draw 8 pixels at a time (2bpp), so it's clocked 28 times per column drawn (shifted in by the clock).

>5. What do the "D" and "L" in DCLK and LCLK stand for?

D is Data, L is for Line (maybe C for column would make more sense, but too late, I already named it LCLK :P )... it'll make more sense when you look at the attachments. LCLK is pulsed at the start of a column, D is clocked 28 times to shift the data in.

>6. Are CLK(A,B,C) just (as I suspect) inputs to an OR gate that enables the LED drivers?
They're the CLK pins described on 5-23-1.

Attached are pics connected to my logic analyzer... one shows multiple columns drawn (right after /reset goes high), the other is just a single column. It should be easy to pick out which pins are which (except the data lines).

DogP